Translation of Objects When Generating Partitioned Diagrams

When you use Capital Schematic Generator for Systems Integrator to generate functionally partitioned wiring diagrams in Capital Logic Designer, the system translates various types of object in particular ways.

Multicores

For each multicore, Capital Systems Integrator Assist looks for the longest section of parallel running wires or for where the wires are closest together. The multicore indicators are placed on these sections.

If the section is long enough, an indicator is added at each end. If the multicore is shielded, Capital Schematic Generator for Systems Integrator routes the shield from the indicator to wherever it is connected.

Figure 309: Indicator Each End

If Capital Schematic Generator for Systems Integrator cannot find any parallel section of the wires, it adds indicators at the ends of only the first wire in the multicore.

Figure 310: Indicators at End of First Wire Only

Additionally, if you have defined the multicore in Capital Logic Designer, Capital Schematic Generator for Systems Integrator may create one or more inline connections across the original functional path for which the multi-term was defined. In this case, multi-term indicators are required at the ends of each new wire segment created near the inline connectors.

Figure 311: Indicators at End of Each New Wire Segment

If the multicore is terminated, an additional connector pin is created to accommodate the shield termination for each inline connector in the path.

Figure 312: Additional Connector Pin

Variant

Multicores

In the generated diagrams, the system creates variant multicores based on variants defined for each innercore.

For example, you have a multicore MC1 containing WIRE1 and WIRE2.

Scenario	Wire - Variant	Wire - Variant	Output in Generated Diagram
Variant is defined on each innercore	WIRE1 - A WIRE1 - B	WIRE2 - A WIRE2- B	Creates two multicores (variant A and variant B): MC1 (A) WIRE1 (A) WIRE2 (A) MC1 (B) WIRE1 (B) WIRE2 (B)
No innercore defined for a variant	WIRE1 - A WIRE1 - B	WIRE2 - A WIRE2	Creates two multicores (variant A and variant B): MC1 (A) WIRE1 (A) WIRE2 (A) MC1 (B) WIRE1 (B) WIRE2 (B)

Device Attributes

If you are generating diagrams with no slot internal connectivity and multiple devices exist in a slot, all attribute values are retained for each device. If a slot contains several devices of the same type, the attributes of each instance are retained and placed appropriately onto the wiring diagrams.

If you are generating diagrams with minimum slot internal connectivity or all slot internal connectivity, a device is generated for each functional source device so the attributes of the functional source device are replicated onto the appropriate device in the generated diagram (except in the case of combined devices).

Multiple Components in a Slot

Examples of a slot with multiple components are a fuse box and a power distribution box. These slots represent assemblies that are made up of several components that provide current protection between the vehicles power system and loads.

A power distribution box contains fuses and relays that protect and activate loads in the vehicle. The configuration typically includes a direct feed to the battery/generator that many of the fuses and relays connect to via a buss bar. The buss bar connections are all internal to the power distribution box. Additionally, there may also be connections between relays that exist within the power distribution box. Any connection that is required by the vehicle loads then has a feed from the power distribution box to the loads or fuse panel.

The internal connections are considered virtual because they are part of the power distribution assembly. Regardless, they need to be represented in the functionally-partitioned wiring diagrams because, in many cases, the contents of the power distribution box is distributed across a set of diagrams based on function. Without this additional connectivity, the wiring diagrams would have open connections.

• Parallel components in a slot The following example shows how parallel components are translated if Capital Schematic Generator for Systems Integrator is running in All Slot Internal Connectivity mode. Figure 313: Parallel Components in a Slot: Capital Logic Designer Functional View  Figure 314: Capital Systems Integrator Slot - Power Distribution Box In order to visualize logical connectivity that exists between the relays in the wiring diagram, the system must create a shared device and it must contain both logical and physical connections defined within the slot. This is the only way that the system can recognize the connectivity and translate it to the wiring diagrams. In this example, the physical connections are the connections to the slot connector pins 1, 2 and 3. Pins 2 and 4 of the relays are the slot connectors required for display. Therefore, two additional connections need to be defined for the shared device in order to display the logical connectivity in the wiring diagrams. The resultant shared device therefore has five connections, three real and two virtual as shown below: Figure 315: Resultant Shared Device  Figure 316: Generated Wiring Diagrams in Capital Logic Designer:  Note that the power distribution box assembly contains its own connectors. Therefore, the connections must be displayed as part of the physical connectivity in the wiring diagrams. Additionally, the correct slot connector displays in the wiring diagrams. If Capital Schematic Generator for Systems Integrator is running in All Slot Internal Connectivity mode, the above example is translated as follows: Generated wiring diagrams in Capital Logic Designer: Figure 317: Generated Wiring Diagrams: All Slot Internal Connectivity  Note that the logical slot connectivity is missing. All connections that are within a slot are not added to the generated wiring diagrams.

• Series connectivity for components within a slot The following example shows how connectivity that exists between components within a slot displays in the generated wiring diagrams if Capital Schematic Generator for Systems Integrator is running in All Slot Internal Connectivity mode: Figure 318: Series Connectivity: Capital Logic Designer Functional View  Figure 319: Capital Systems Integrator Slot - Power Distribution Box (Components within Slot)  Note that the slot contains two components in series. In this case, only the connections to the slot connector are normally created as part of the shared device. In order to display the connectivity in the wiring diagram, the shared device must have two more connections defined. The connection defined by Rly1 pin 2 and Rly 2 pin 3 must be included in the shared device as shown below: Figure 320: Series Connectivity: Shared device  Figure 321: Series Connectivity: Generated Wiring Diagram in Capital Logic Designer Note that a shared device pin exists for each relay pin. If the Add Slot Internal Connectivity box is not checked on the Wiring Design Generator dialog box, the above example is translated as follows: Figure 322: Series Connectivity: Generated Wiring Diagrams without Slot Internal Connectivity:

Wiring Demoted Internally to a Slot

Within Capital Systems Integrator, you can demote synthesized wiring to slots. That means, the wiring no longer exists as part of the harness but as part of the slot assembly.

The following example shows how this is translated by Capital Schematic Generator for Systems Integrator:

Figure 323: Wiring Demoted Internally: Capital Logic Designer Functional View:

Figure 324: Capital Systems Integrator Slot (Power Distribution Box) and Initial Synthesized Wiring:

Figure 325: Internal Connectivity of Slot and Demoted Topology Wiring:

The shared device created in order to display the internal splice pins and the resulting wiring diagrams are shown below:

Figure 326: Wiring Demoted Internally: Shared Device:

Figure 327: Wiring Demoted Internally: Generated Wiring Diagrams in Capital Logic Designer:

Distributed Objects (Power and Ground Paths)

You must add ground signals manually to diagrams in Capital Logic Designer and Capital Systems Integrator. In Capital Systems Integrator, the ground devices are grouped together within slots based on proximity. This causes the ground device within each slot to be instantiated with a common name. When you use Capital Schematic Generator for Systems Integrator to generate wiring diagrams in Capital Logic Designer, the new names for the ground devices are applied to the wiring diagrams for each ground signal.

The following example shows how these distributed objects are translated when using Capital Schematic Generator for Systems Integrator to generate wiring diagrams:

Figure 328: Distributed Objects: Capital Logic Designer Functional View:

The physical path between components and ground device appear as continuous and unbroken. This requires the distribution of splices and inline connectors. The splice and inline pin pairs are repeated as needed for each ground path. Only the wires that reside on the current diagram are available for a splice (for ground path only). Inline pairs are repeated along the ground path to ensure an unbroken path. Therefore, there are no off page connections for splices because they are always distributed across diagrams.

When multiple wires (like those associated to a splice or multi-term) exist for a net path, Capital Schematic Generator for Systems Integrator ensures that they are not laid over one another. Instead, they are routed near the net path and parallel to the path without lying on top of each other.

In conjunction with this, all wiring entities associated with the wires must also follow a net path.

Capital Schematic Generator for Systems Integrator selects a net path to distribute physical connectivity and distributes accordingly along that path without overlap of parallel conductors or arbitrary distribution of other entities (splices and inline connector pairs). The following is an example of this:

Figure 329: Net Path to Distribute Physical Connectivity

Note that each splice is placed near a device pin with enough space provided to place the conductor name. In many cases, you can associate the splice with several pins.

Once you have placed the splices and inline pin pairs, Capital Schematic Generator for Systems Integrator routes the wires along the net path without overlap of parallel conductors.

Component Positioning

If you have used the Prototype tab to select an existing wiring design as a template for the new wiring diagrams, Capital Schematic Generator for Systems Integrator does not extract the X, Y position of objects from the template diagrams in the following scenarios:

• If an instance of an object on a template does not have a corresponding object in the original Capital Systems Integrator design. For example: Figure 330: Component Positioning: Capital Systems Integrator Diagram and Prototype Template Diagram  Figure 331: Component Positioning: New Wiring Diagram

• If an instance of an object on a template has fewer pins than a corresponding object in the original Capital Systems Integrator design. In this case, the object and its positioning is copied from the Capital Systems Integrator design. For example: Figure 332: Fewer Pins: Capital Systems Integrator Diagram and Prototype Template Diagram Figure 333: Fewer Pins: New Wiring Diagram  Note that if the instance on the Capital Systems Integrator diagram has the same number of pins but the symbol is modified, the system uses the new symbol but bases the positioning on the instance in the template diagram. For example: Figure 334: Same Number of Pins: Capital Systems Integrator Diagram and Prototype Template Diagram Figure 335: Same Number of Pins: New Wiring Diagram

• Sometimes an instance of an object in the template design is attached to a path that differs in connectivity from the path in the new wiring design. In this case, the corresponding instance in the Capital Systems Integrator diagram is copied to the generated diagram. For example: Figure 336: Different Connectivity: Capital Systems Integrator Diagram and Prototype Template Diagram Figure 337: Different Connectivity: New Wiring Diagram

• If an instance of an object on a template diagram has less complexity based on option tag expressions, only the options that apply based on the template definition are visible in the new wiring diagram that is generated. In short, if there are components that are visible in the Capital Systems Integrator diagram but they are not visible on the template diagram because of optioning, those components are not added to the new wiring diagram that is generated. For example: Figure 338: Less Complexity: Capital Systems Integrator Diagram and Prototype Template Diagram Figure 339: Less Complexity: New Wiring Diagram

Route Paths

If you have used the Prototype tab to select an existing wiring design as a template for the new wiring diagrams, the routing of signals follows the paths in the template diagrams when:

• The path connectivity in the template diagram is the same as the path connectivity that is defined in the Capital Systems Integrator diagrams. For example: Figure 340: Route Paths: Capital Systems Integrator Diagram and Prototype Template Diagram Figure 341: Route Paths: New Wiring Diagram

• The device pins that are connected by the path in the Capital Systems Integrator design are in the same locations as on the generated wiring diagram. Otherwise, the routing uses the route defined by the logical connectivity.

Device Attributes and Device Pin Attributes

Source functional device attributes and device pin attributes are converted into the properties on the generated physical devices and device pins. The graphical representation of the source functional attributes is used for the representation of the corresponding properties.

Daisy Chains

Wiring shields are generated as daisy chains when the corresponding shield in the original functional diagram is drawn as a daisy chain. Daisy chains are not supported when the wiring shield is connected to a splice in the original functional diagram and the Capital Systems Integrator design does not use pig tails.

For example:

Figure 342: Original Functional Design with Multicore and Daisy Chain

Figure 343: Generated Wiring Diagram with Multicore and Shields Termination

Junction

Boxes

Junction boxes are split at each pin to enhance the readability of the generated diagrams. In a generated diagram, you can re-join the split junction box if desired. See Joining Objects in the Capital Logic Designer User Guide.

Figure 344: Junction Box Split in Generated Diagram

Parent Topic:

Capital Schematic Generator for Systems Integrator

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens