Wiring > Synthesis Analyzer Mode

Switching to

Synthesis Analyzer Mode for a Signal

After wiring synthesis, you can switch the Design Assistant tab into a Synthesis Analyzer mode that helps you to investigate why a signal has not routed in particular configurations. In this mode, you view diagram objects related only to that signal in a particular configuration. This means, you can clearly see the paths that are available (and not available) for the signal, as well as the constraints that directly affect this signal's synthesis result. This allows you to focus your investigation on just these areas.

Note

Four videos are available that provide guidance an overview of Synthesis Analyzer mode; including information about the user interface elements and approaches to identifying and fixing synthesis issues. See Synthesis Analyzer Mode Overview Videos.

Prerequisites

Wiring synthesis should have run.
You should have run the Design Assistant to identify the routed state of signals (routed, unrouted, or partially routed). See Calculating the Routed State of Signals.

Procedure

If the Design Assistant is not already open, open it either by pressing Space Bar and entering Assistant or by clicking the Open Design Assistant button () on the Design Browser (Design tab on the lower left of the application). The Design Assistant displays in the Output Window at the bottom of the application. Figure 303: Design Assistant in Application
Select the signal that you want to analyze by clicking it in a message displayed on the Design Assistant tab or by clicking the signal (or wires belonging to it) in the Design Browser (Design tab).The signal is highlighted in the diagram window.
Click the Switch to Synthesis Analyzer button () on the Design Assistant tab toolbar.The Design Assistant tab switches to Synthesis Analyzer mode. See the Synthesis Analyzer Mode table under Design Assistant for full descriptions of all of the controls on the Design Assistant tab in this mode.
On the Design Assistant tab, select the type of configurations in which you want to analyze the signal. Persisted Level Configurations The set of physical configurations that you can see in the Configuration Setting Browser Window (Configuration tab) on the lower left of the application. These are the maximum complexity configurations generated by Composite Wiring Synthesis.

All Level Configurations All physical configurations including those that would be created by the Composite Wiring Synthesis option for generating full configurations. These configurations are generated only temporarily and your data is not changed in any way.

Abstract Option Configurations All of the temporary configurations built by Modular Wiring Synthesis to generate abstract wiring. The system creates these by finding all the options for each vehicle model, and creating temporary configurations for all the combinations of active options. The system generates names for these temporary configurations using the vehicle model name and an index number (for example, LHD_0, LHD_1, and so on).

Click the Analyze the selected signal () button to run synthesis analysis for the signal.

Results

The name of the signal being analyzed displays at the top right of the Design Assistant tab.
A dropdown on the Design Assistant tab lists the configurations in which the signal is not fully routed.

Your “Persisted Level Configurations / All Level Configurations / Abstract Option Configurations” selection controls what type of configurations are listed. If you hold the mouse cursor over a configuration name in this dropdown, a tooltip displays further information: For an abstract configuration, it displays the options that are unrouted for the signal in this configuration. You can use this information to identify where a bundle is excluded from a configuration due to its option expression.

For a physical configuration (from persisted level configurations or all level configurations), it displays the variant options in the configuration.

The diagram window updates to show the topology paths available to the signal in the currently selected configuration (you can switch between the listed configurations): The system hides any objects that the signal cannot reach in general (slots, bundles, inlines, and so on).

The system dims any objects where the signal is excluded by constraints or options.

If you hold the mouse cursor over an object in the diagram, a tooltip displays particular routing constraints that apply to it. It also tells you on what object the constraint was set (for example, the design, a bundle, a slot). The constraints that can be displayed in the tooltip include: Max Wires per Multiterm

Max Wires per Splice

Minimum Splice Separation

Network specification

Network termination

						Prefer route

Route by Attribute/Property

Note If a bundle contains any wires for the signal which are constrained by prototype wiring, this will be indicated in the tooltip. See Prototype Wiring for more information about this concept.

The configuration currently selected from the dropdown list dictates what is displayed in the following user interface elements: The Design Browser (Design tab)

A Signal Map dialog box with the active wiring filter applied

On the Configuration Settings Browser Window (Configuration tab), the Set all levels in design active () button, the Set all levels in design inactive () button, and the check boxes in the configuration browser tree are dimmed. You can still scroll the tree, and expand or collapse the nodes.
There are several controls on the Design Assistant tab that you can use to help make the diagram clearer.

Table 21: Synthesis Analyzer Controls for Filtering Diagram ContentObject

Description

Toggle highlighting of the signal being analyzed

Controls whether the signal being analyzed is highlighted in the diagram or not. When you turn the highlighting off, the system also deselects the signal in the Design Browser (Design tab). If you turn the highlighting back on, the system does not re-select the signal in the Design Browser.

Toggle visibility of the junction boxes usable by the signal

Controls whether junction boxes (and paths to them) are hidden or displayed in the diagram. You can have splices within junction boxes, which means they can be possible targets for many signals. While that can be useful, often users know they are not going to put splices inside junction boxes (either for one signal or all signals) so do not need to see those paths while investigating a signal. Hiding them reduces the complexity of the diagram.

Toggle visibility of the spur bundles usable by the signal

Controls whether spur bundles are visible on the diagram or not. A spur bundle is a bundle off the main signal route where the system might position a splice for the signal if splice constraints make it necessary.

Sets the opacity of excluded bundles

Displayed only in Synthesis Analyzer mode. When you view the available paths for a signal in a diagram in Synthesis Analyzer mode, graphics are dimmed where bundles are excluded by constraints or options. This controls how dim those graphics display.

You can come out of Synthesis Analyzer mode by clicking the Switch to Design Assistant button () on the Design Assistant tab. The Design Assistant retains any messages that were displayed before you switched into Synthesis Analyzer mode.

Parent Topic:

Synthesis Analyzer Mode