Daisy-chained Networks

in Wiring Synthesis

Through the use of object attributes and constraints, you enable wiring synthesis to support daisy-chained networks.

You can watch the following videos for an example of defining a daisy-chained network.

Defining a daisy-chained network in Capital Logic Designer:

Defining a daisy-chained network in Capital Systems Integrator:

When synthesizing wiring for a daisy-chained network, the system will generate bypass wiring for optional devices.

Figure 273: Daisy-chained Networks and Bypass Wiring

The graphic above shows a logical system design at the top and the synthesized physical wiring for it at the bottom.

In a logical system design, you may have the following:

Figure 274: Example Logical Design

Here you can see that the same multicore is connected twice to the device (except terminators).

Before wiring synthesis can generate wiring for a daisy-chained network, you must specify object attributes or constraints that provide synthesis with information about the following:

• Pins in the network

• Maximum length of network

• Pins at end of network

Pins in Network

Synthesis needs to ensure that it connects each multicore to the correct pair of pins at a device. In order to do this, you must assign each pair of pins to a separate 'network group'.

There are two ways of doing this:

• In Capital Logic Designer: Specify a Network Group attribute for pins in a network group. The value of the Network Group attribute on a pin indicates the network group to which that pin belongs. The value (which acts as a network group name) can be anything (for example “1” or “2”, “in” or “out”) but must be the same for the pins in a group. Capital Systems Integrator uses these values to identify network groups when synthesizing wiring. Using the SRS SENSOR FR example, Capital Systems Integrator needs to know that the following pins are paired as network groups: CAN1H and CAN1L are a network group 1.

CAN2H and CAN2L are a network group 2.

Figure 275: Logical Network Groups You therefore specify a Network Group attribute of 1 on pins CAN1H and CAN1L, and a Network Group attribute of 2 on CAN2H and CAN2L. Note Remember that the network groups can be named anything as long as the attribute value is the same for all pins in a group. 1 and 2 are just examples.

• In Capital Systems Integrator (before running wiring synthesis): Add “Daisy-chained network group” constraints to appropriate objects. You can add this constraint to any object from a pin upwards (pin, connector, slot, design). It specifies that a device pin or cavity matching a particular attribute value belongs to a particular network group. Using the SRS SENSOR FR example again, you could set the following constraints: Figure 276: Daisy-Chained Network Group Constraints For the device SRS SENSOR FR, wiring synthesis will recognize pins CAN1H and CAN1L as network group 1, and recognize CAN2H and CAN2L as network group 2.

Maximum

Length of Network

You can set a “Daisy-chained network specification” constraint on the Capital Systems Integrator design. It identifies a multicore as being a daisy-chained network and also controls the maximum length that a daisy-chained network can have in the wiring generated by wiring synthesis.

For example: For the CAN1 and CAN2 signals (signals with Name attributes starting with CAN), you could specify a maximum length of 10000.0:

Figure 277: Daisy-chained Network Specification Constraint

Pins

at End of Network

As with other (backbone) networks, you must also consider which pins are at the end of the network.

There are two ways of doing this:

• In Capital Logic Designer: Specify a Pin Type attribute for pins. You can set a Pin Type attribute of IxOTerminated on the pins at the ends of the network.

• In Capital Systems Integrator (before running wiring synthesis): Add “Network termination” constraints to appropriate objects. You can add this constraint to a cavity, slot connector, interface connector, hole, slot, or diagram. It cannot be applied to an inline or its cavities. It enables wiring synthesis to set pins as IxOTerminated when a multicore or signal going to that pin has a particular property or attribute value. For example: You could set pins as IxOTerminated when the CAN1 and CAN2 signals go to them. Figure 278: Network Termination Constraint

Synthesis

of Daisy-chained Network

After you have defined the necessary attributes or constraints, wiring synthesis then does the following for daisy-chained networks:

• Determines the optimum order of devices in the network for each configuration.

• Generates point-to-point multicores between the devices in this order.

• Creates bypass multicores that bypass optional devices.

Parent Topic:

Backbone and Daisy-chained Networks

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens