Output Window

The Capital Systems Integrator Output Window is located at the bottom of the application window. It displays the tool output during operations.

Figure 429: Output Window

Note

Press Space Bar and enter Toggle Output Window to view or hide the output window. If the box is checked, the Output Window is visible; if it is not checked, the Output Window is hidden. Information sent to the window is not lost while the window is hidden.

Each tab has a pop-up menu, accessible with a right mouse button click, that contains text manipulation commands (Select All, Copy, and Clear).

Field	Description
Capital Systems Integrator	Shows the output of the Capital Systems Integrator commands.
Change History	Use this tab to compare the live data in a Capital Systems Integrator design with the design data prior to the last save of that design or prior to the last action. See Change History.
Design Assistant	Groups together a number of design rule checks and other actions within a single interface. This helps you to understand where you are in the design flow. It allows you to run a sub-set of design rule checks on the design. See Design Assistant.
Harness Import	Displays any issues when importing harness data using Capital Systems Integrator Harness Exchange functionality.
Level	Displays the report when you create an options and levels report for a topological design.
Place	Shows the status of any device placements and moving of slices to slots performed in the diagrams.
Report	Displays the report when you create a topological design’s harness report.
Route	Shows the status of any routing actions performed in the diagrams.
Signal Details	Provides details of why specific signals have failed to route when you have synthesized wiring. If the reason given for a routing failure is “Disconnect due to routing” constraint, this normally indicates a constraint related to splices or multiterms.
Signal/Multicore Name (Wiring View) Note Named Multiple Signals if multiple signals and/or multiple multicores were selected.	Displayed when you select a signal(s) in the Design Browser (Design tab) and click the Visualize the selected signals button. This displays a wiring view of the selected signals. If a signal is a member of a multicore, it displays a wiring view of the entire multicore. The wiring view shows individual devices, connectors and wires that implement the signal(s). You can tear this tab from the interface so that it is a free-floating dialog box that you can resize. To do this, click the tab name and drag it. If you do not tear the tab from the interface, the tab is replaced when you generate a wiring view for another signal. If you tear off the tab, it remains unchanged when you generate a wiring view for another signal and a separate tab is created. To return the wiring view to the Output Window, close the dialog box. See Generating a Wiring View of a Synthesized Signal or Multicore for further information about the task. See Signal/Multicore (Wiring View) Tab (Output Window) for information about the user-interface elements on this tab.
Sync	Displays information about the synchronization of topological data with logical data from Capital Logic Designer.
Synthesis	Reports on the synthesis actions and signals that have failed to route. For a failed signal, you can click the Details link to view the reasons why it failed to route. When you click the link, the details display on the Signal Details tab in the Output Window. You can click Save detailed failure report to access the Select Output File dialog box that enables you to save a report detailing failed signals and the reasons why they failed to route. You can save the report in CSV (comma-separated values) or HTML format.

Parent Topic:

Application Interface Help

Capital Systems Integrator User Guide, 2512.2606

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