Capital Schematic Generator for Systems Integrator > Custom Partitioned Wiring Diagrams

Generating Custom Partitioned Wiring Diagrams

According to a User-Defined Property

You can generate a single design containing a set of Capital Logic Designer wiring diagrams that are partitioned according to a user-defined property that exists on the functional devices and pins in the associated Capital Logic Designer designs. The user-defined property values must be comma-separated lists of the wiring designs on which the devices and pins must appear.

See Translation of Objects When Generating Partitioned Diagrams.

Prerequisites

In the associated Capital Logic Designer designs, you must have set a partitioning property on the functional devices and their pins. See Overview of Flow for Custom Partitioned Diagrams.
You must have synthesized wiring in the Capital Systems Integrator design. See Composite Data Management.

Procedure

Right-click the Capital Systems Integrator design in the Project Browser Window and choose Generate Wiring Diagram; the Generate Wiring Diagram Dialog Box displays.
From the drop-down list at the top of the dialog box, choose Generate Custom Partitioned Diagrams.
On the Design tab, specify the following for the generated design:Name

Revision

Release Level

Parent Folder

Style Set

On the Options tab (with “Custom Partitioned Diagrams” selected), select the Partitioning Property and specify whether you want the wiring diagrams to include any “Slot Internal Connectivity”.Caution When you use prototype designs for diagram generation, the current generation must use the same Slot Internal Connectivity settings as were used for the prototypes.
Still on the Options tab, specify the following options for the diagram generation:Always Add Ground Paths

Distribute Splices

Pin and Device Name Retention (Displayed only if Slot Internal Connectivity setting is None)

Utilize Combined Devices (Displayed only if Slot Internal Connectivity setting is Minimum or All)

Property Retention (Displayed only if Slot Internal Connectivity setting is None)

Merge Combined Device Properties (Displayed only if Slot Internal Connectivity setting is Minimum or All)

Hide Unconnected Pins and Connector Cavities Caution If you are generating partitioned diagrams with a view to bridging out the wiring data and importing it into a Capital Systems Integrator design again, you should ensure the following: Hide Unconnected Pins And Connector Cavities on the Options tab is not selected. This is so that cavities with no connected wires are generated in the wiring diagrams. Otherwise, the result is different signal routings when the wiring is imported back into a Capital Systems Integrator design. Note also that connector refinement is not supported by Capital Schematic Generator for Systems Integrator when you are using the specific flow in this caution.

Use Refined Connectors

Multicore Indicator Offset

Wire spacing

Click the Filter tab. Here you specify whether you want the generated diagrams to include wiring for particular vehicle configurations or harness levels (see Vehicle Configurations versus Harness Levels for some guidance). If you want to...

Do the following:

Use vehicle configurations

Do not select “Ignore configurations and show all harness levels”. If you have defined vehicle configurations for the Capital Systems Integrator design, the Configuration field displays.

Select the vehicle configurations for which you want to generate the wiring diagram or diagrams. The generated wiring diagrams contain all objects that are active in at least one of the vehicle configurations.

In the Harness field, select the harnesses that you want to be rendered in the generated wiring diagrams.

Use harness levels

Select “Ignore configurations and show all harness levels”.

In the Harness field, select the harness levels that you want to be rendered in the generated wiring diagrams.

Caution If you are generating partitioned diagrams with a view to bridging out the wiring data and importing it into a Capital Systems Integrator design again, you should ensure the following: All of the configurations or harness levels (depending on which you are using) are selected on the Filter tab so that no wiring is lost when importing it back into a Capital Systems Integrator design.

The selection of particular harnesses or harness levels means that Capital Schematic Generator for Systems Integrator renders the following in the generated diagrams: Conductors, connectors, multicores and splices that are active in the selected configurations (if enabled) and that belong to the selected harnesses or harness levels.

Devices (and their pins) that are active in the selected configurations (if enabled), that are not integral to a harness and that are connected to at least one of the selected harnesses or harness levels.

Devices (and their pins) that are active in the selected configurations (if enabled) and that are integral to the selected harnesses or harness levels.

The Design field lists the Capital Logic Designer designs that are associated with the topological design. You can restrict the objects that are rendered in the generated wiring diagram by selecting particular associated designs. By default, all designs are selected.By selecting particular designs, you restrict the objects that are rendered in the generated diagrams to the following: Devices (and their pins) that are active in the selected configurations or harness levels and that have functional sources in the selected Capital Logic Designer designs

Wires and splices that are active in the selected configurations or harness levels and that belong to the signals that have functional sources in the selected Capital Logic Designer designs. This includes signals that represent net equivalence sets with at least one functional source in the selected functional designs.

Multicores that include at least one conductor that is active in the selected configurations or harness levels and that belong to the signals that have functional sources in the selected Capital Logic Designer designs.

Shields that are active in the selected configurations or harness levels, belong to the signals that have functional sources in the selected Capital Logic Designer designs and that connect to multicores rendered in the generated diagrams.

Connector pins attached to the conductors that are rendered in the generated diagrams.

Connectors whose pins are rendered in the generated diagrams.

Connector pins of the rendered connectors that have mated connector pins rendered in the generated diagram.

Backshells and backshell terminations.

If you have selected a Slot Internal Connectivity setting of Minimum or All, the Slot Graphics tab displays. Edit the graphical properties for the objects created from slot-internal connectivity as required. See Specifying How an Object is Displayed Graphically in a Diagram for more information about editing graphical properties.
If you have already used the Capital Schematic Generator for Systems Integrator feature to generate wiring diagrams for a Capital Systems Integrator design in the project, the Prototype tab displays. You can use a generated wiring diagram as a template for a new wiring diagram. If you do not want to do this, skip to step 10.If you use a template, Capital Schematic Generator for Systems Integrator uses the positioning of objects and text annotations from it when generating new wiring diagrams. If the template cannot provide positioning information for an object, the functional diagram that is associated with the Capital Systems Integrator diagram provides this information. In this case, the wiring data from Capital Systems Integrator is redistributed in the new wiring diagrams. If a functional design exists and connectivity for the design exists but no graphical diagrams exist for it, the wiring diagram connectivity is placed in a newly created wiring design but no diagram graphics are generated. See Translation of Objects When Generating Diagrams Using Templates (Prototypes) for more information. Note Template diagrams that were generated with a Generate Functionally Partitioned Diagrams setting give optimal results only if they are used to generate diagrams with the same slot internal connectivity setting. That is, if a template diagram was generated with the Minimum setting for Slot Internal Connectivity, it should be used as a template diagram only when generating diagrams with the same setting. If a path in the source Capital Systems Integrator diagram is more complex than the reference path in the template diagrams, Capital Schematic Generator for Systems Integrator uses its own improved algorithm to determine the layout of the path in the new diagram.

Select the design to be used as a template (prototype) in the Prototypes field.

Click OK.

Results

The new design and appropriate number of diagrams are generated and added to the Project Browser Tree for Capital Logic Designer.
One diagram is opened automatically in a diagram window.
If the wiring diagrams use the layouts of already existing functional diagrams from Capital Logic Designer, the wiring diagrams are given the same names as the functional diagrams.
The system generates an Wiring Diagram report in HTML format and saves it in a WiringDiagramReports sub-directory in your Capital temp directory. It has a name in the following format: CAVAI_Report_date_time.html. See Wiring Diagram Report for details about the report.

Parent Topic:

Custom Partitioned Wiring Diagrams