Synthesis Analyzer Mode

Overview Videos

A series of videos are available to provide an overview of Synthesis Analyzer mode. They provide guidance about the user interface elements and approaches to identifying and fixing synthesis issues. After wiring synthesis, you can switch to the Synthesis Analyzer mode that helps you to investigate why a signal has not routed in particular configurations. In this mode, you view diagram objects related only to that signal in a particular configuration. This means, you can clearly see the paths that are available (and not available) for the signal, as well as the constraints that directly affect this signal's synthesis result. This allows you to focus your investigation on just these areas.

Video Title and Learining Objectives	Video (Link)
Synthesis Analyzer 1: Accessing Synthesis Analyzer Mode Access Synthesis Analyzer mode for a signal after Modular Wiring Synthesis. Toggle highlighting of signal being analyzed. Consider example issue of topology break.
Synthesis Analyzer 2: Constraint or Option Issues in Configurations Consider Synthesis Analyzer mode within the context of a configuration. Dim bundles excluded from available paths by constraints or options. Use tooltips to view constraints that affect objects. Consider example issue caused by a constraint. Consider example issue caused by option expression on a bundle.
Synthesis Analyzer 3: Issues Related to Splices, Multiterms, and Inlines Consider issue related to splices or multiterms. Toggle visibility of bundles off main path where splices could be created. Consider issue related to cavities on an inline.
Synthesis Analyzer 4: Synthesis Analyzer Mode after Composite Wiring Synthesis Use Synthesis Analyzer mode after Composite Wiring Synthesis (CWS). Consider configurations listed by Synthesis Analyzer after CWS. Consider example issue related to harness levels. Consider example issue related to unexpected path of a fully routed signal.

Parent Topic:

Synthesis Analyzer Mode

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens