Capital Schematic Generator for Logic Designer > Capital Schematic Generator for Logic Designer Dialog Box and Field Reference > Usage Examples - Connectivity Processors
ConnectivityBetweenPinLists
The ConnectivityBetweenPinLists processor retrieves connectivity between two or more pinlists in a design to identify and visualize common circuits and connections between multiple components, such as ECUs, sensors, and ground devices.
Note
To use this processor effectively, you must provide at least two pinlists in a query.
Example 1
Original Design
Connectivity Filter
Expected Output
Example 2
Original Design
Connectivity Filter
Expected Output
Example 3
Original Design
Connectivity Filter
Expected Output
Example 4
Original Design
Connectivity Filter
Expected Output
Connectivity is traversing through the inline and will retrieve all the connections between DEV1 and DEV2.
Example 5
Original Design
Connectivity Filter
Expected Output
All common connections between DEV1, DEV2, and DEV3 will be retrieved.
Example 6
Original Design
The FUSE device does not have any internal links between its pin A and pin B.
Connectivity Filter
Expected Output
Fuse pins do not have any internal connections so the signal will not traverse from pin A to pin B of the FUSE device. As connectivity is not retrieved, the diagram is not generated.
Example 7
Original Design
Connectivity Filter 1
Expected Output
Connectivity Filter 2
Expected Output
Parent Topic:
Usage Examples - Connectivity Processors
Capital Logic Designer User Guide, 2512
Unpublished work. © 2025 Siemens
Source: https://docs.sw.siemens.com/en-US/doc/861057055/202410078.capital_ld_user/vqj1596864355978 · retrieved 2026-07-18