Capital Wiring Integrator

High-Level

Flow for Using Capital Wiring Integrator

This topic provides an overview of the intended flow for using Capital Wiring Integrator.

Note

This particular flow assumes that you are creating the topology within Capital. Alternatively, you can bridge in the topology from MCAD using one of the Capital MCAD topology connectors. See “Capital Wiring Integrator Connectors” in the Capital Connectors User Guide to bridge data in and out of Capital Wiring Integrator, and use the connectors and their functionality.

Start Capital Logic Designer with Capital Wiring Integrator enabled. See Launching Capital Logic Designer.
In Capital Logic Designer, create a topology design. See Topology Designs. Note Capital Wiring Integrator uses a style set to style objects on diagrams. See Styling Objects (Capital Wiring Integrator).
Specify the physical scale of the diagram. See Physical Scale. Caution This must be done prior to creating the topology (for example, bundles) because the graphical length of bundle graphics (relative to the skeleton) will change if you change the scale. This means the bundles would no longer fit correctly with the skeleton.
Add the following objects as required to create the topology layout: Skeletons

Slots (with or without Holes)

Slot Connectors

Bundles (you can have Multiple Harnesses at Connectors)

Inline Pairs

Note You can set rules and constraints on the diagram and individual objects. See Constraints (Capital Wiring Integrator).

Create wiring designs and diagrams in Capital Logic Designer.
(Optional) In the Capital Logic Designer designs, set a property or attribute on wires that you will later use to group wires into signals in the topology design. The values of the property or attribute will be the name of the signals. See Signals for a detailed description of how signals are modeled in a topology design.
Associate the Capital Logic Designer designs with the topology design. See Logical Design Association. The topology design is synchronized with the Capital Logic Designer designs such that the Design Browser (Capital Wiring Integrator) displays the associated Signals and wiring (Wires (Capital Wiring Integrator), Multicores, devices, harness connectors, Device Connectors (Capital Wiring Integrator), and Inline Pairs) that could be automatically associated. The Wiring Browser indicates the logical objects that are and are not associated with topology objects. See Synchronizing Wiring Changes With a Capital Wiring Integrator Design.
(Optional) Specify the wire property or attribute that identifies the signal to which group they belong. See Grouping Wires into Signals.
If there are unassociated devices on the Wiring Browser, add slots for them to the diagram. See Adding a Slot With a Device to a Topology Diagram.
Run bundle reports to determine the contents (wires, multicores, and shields) and the approximate diameter of the bundles. See Bundle Wires Report. Tip You can run design rule checks on the diagram (see Design Rule Checks (Capital Wiring Integrator)), use Capital E/E Reporter to report on the design data (see the Capital E/E Reporter User Guide), and compare the topology design with wiring designs. See Comparing Objects and Their Properties in Design Revisions or Build Lists.
To locate or edit a particular object on the source Capital Logic Designer designs, use the “Show Physical Source” function to open the relevant diagram and make the edit. See Locating a Source Physical Object in a Capital Logic Designer Design.
Select the topology design to open it in the Diagram window again. The edits from the Capital Logic Designer design are reflected in the topology design.
You can annotate wire lengths from the Capital Wiring Integrator design back to the wires in the Capital Logic Designer designs. See Annotating Topology Wire Lengths and Harness Attributes Back to Logical Design Objects.

Parent Topic:

Capital Wiring Integrator