Stacked Pins Overview

The overview describes the behavior and usage of stacked pins in the application.

Restriction

You cannot stack the pins on devices added as a symbol and you cannot use the Replace Symbol action on any objects with stacked pins. This applies when any actions attempt to replace a symbol such as assigning a library part, bulk update of library parts, or Find and Replace.

Highways which represent a grouping of wires or nets, are used to represent an interconnect. You can also manually terminate a highway at a stacked pin. A highway is created automatically if a pin that is connected to a conductor is added to a stacked pin or if you manually connect a conductor to a stacked pin. You can therefore define the connectivity of block diagrams by connecting conductors to pins in a stacked pin or by connecting conductors to pins prior to its insertion into a stack. If you remove a pin that is connected to a conductor from a stacked pin, it will maintain its connectivity and the conductor will be drawn automatically.

Stacked pins can be used on shared and non‑shared devices, plugs, jacks, inlines, and blocks. No single pin in a stack can be connected to more than one conductor and restricted‑usage pins can only be placed in stacks on diagrams where the pin can be used.

If you draw a conductor between two stacked pins that are already connected by a highway:

• The conductor is added to the highway and the first unconnected pin from each stack is selected.

• If there is no unconnected pin at one end, the conductor is still added to the highway but standard design rule checks will indicate that conductors are unterminated.

• If both stacks have no unconnected pins, you are not permitted to complete the action.

You cannot add more than one non-reference instance of a pin to a stack and you cannot add reference pins to a stack.

Restriction

When using Capital Schematic Generator for Logic Designer or Capital Schematic Generator for Systems Integrator, connected stacked pins are not rendered and you cannot paginate existing designs (using Schematic Generate Diagrams) if the source diagrams have connected stacked pin representations. Also, you cannot use a design with connected stacked pins as a template / prototype for any generated designs or diagrams.

See Overview of Capital Schematic Generator for Logic Designer for a description of how unconnected stacked pins are displayed on generated diagrams.

In the Design Browser stacked pins are represented as a collection of pins listed under the device. Each stack of pins is named using the number of pins in the stack and the total number of pins on the object. For example, if two pins are in the stack and there are six pins in total on the object, the stacked pin is named “2 of 6”.

In this example, DEV304 has three pins. Two of the three pins (1 and 2) are stacked. Pin 3 is not stacked:

The appearance of stacked pins can be styled. See “Style Sets” in the Capital Diagram Styling User Guide for more information about style sets and how to edit them. There are three default attributes for a stack of pins that you can use in styling:

Name

The name of the stack of pins.

Num Pins

The number of pins in the stack.

Total Num Pins

The total number of pins on the object.

Parent Topic:

Stacked Pins

Capital Logic Designer User Guide, 2512

Unpublished work. © 2025 Siemens