Capital Schematic Generator for Systems Integrator
Generation of Slot Connectivity in Partitioned Diagrams
Capital Schematic Generator for Systems Integrator generates one device (slot internal device) for each placement of a functional device in a slot. The generated device has the name and all the properties and attributes of the functional device. The generated device also has an attribute that contains the name of the Integrator slot from which it was generated. This attribute is not editable in the wiring diagram and displays only if it is set. If the slot has an integral connector, the device is generated with a Harness attribute and a Levels property. If the device has a single functional source, any library data, analysis data and symbol model data is replicated onto the generated device.
The option expression of the generated device is the following expressions ANDed together:
The option expression used for the placement of the functional device.
The option expression of the functional device itself.
The final expression puts each non-empty expression in parenthesis and separates them with &&:
(Option expression 1) && (Option expression 2)
One pin (slot internal pin) is generated on the slot internal device to represent each functional pin. The pin inherits the name, attributes and properties of the functional pin.
Capital Schematic Generator for Systems Integrator sometimes generates a slot boundary device to represent a slot and its slot external pins. A slot boundary device is always a shared device.
Slot boundary devices are required when there is complex slot internal connectivity. Examples of complex slot internal connectivity are:
There is a connector cavity or a hole connection associated with the slot that has multiple functional pins mapped to it. A pin would be generated for each such connector cavity or hole connection on the slot boundary device. Figure 387: Example of Complex Slot Internal Connectivity where Multiple Functional Pins Connect to a Single Slot Cavity
There is a functional pin mapped onto multiple connector cavities or hole connections. A pin would be generated on the slot boundary device for each such connector or cavity hole. Figure 388: Example of Complex Slot Internal Connectivity where a Single Functional Pin Connects to Multiple Holes
There are more than one functional devices mapped to cavities connected to the same slot connector. Figure 389: Example of Complex Slot Internal Connectivity where Multiple Functional Devices Connect to the Same Slot Connector
Although not complex slot-connectivity, the mapping of cavities to an internal splice also requires a slot boundary device. Figure 390: Slot Internal Splice Connected to Cavities
Slot boundary devices are optional in a generated design when:
- The mapping of functional pins to cavities or holes is one to one and all the cavities of the connector are connected to a single functional device, this is simple slot internal connectivity. Figure 391: Example of Simple Slot Internal Connectivity where Each Functional Pin Maps One to One with Cavities
Capital Schematic Generator for Systems Integrator can run in three modes where it displays slot internal connectivity in the generated wiring diagrams:
All Slot Internal Connectivity - All slot internal connectivity is generated. The connectors are always associated with the slot boundary device. Figure 392: Example of Simple Slot Internal Connectivity Generated in All Slot Internal Connectivity Mode
Minimum Slot Internal Connectivity - Optional slot internal connectivity (simple connectivity) is not displayed in the generated wiring diagrams. The connector pin is directly mated with the slot internal device pin. Figure 393: Simple Slot Internal Connectivity Generated in Minimum Slot Internal Connectivity Mode
Filter Slot Internal Connectivity - All slot internal connectivity is generated for specific slots only. You may not want to generate slot internal connectivity signals for all slots. For example, you may want to do that only for power distribution boxes or grounds. This mode allows you to filter the specific slots for which you want to generate slot internal connectivity. You do this by writing filter queries based on attributes, properties, plug-in queries, or user-defined queries. The system will then generate slot internal connectivity only for the slots identified by the filters. It will not generate it for other slots. See Specifying Filters for Generation of Slot Internal Connectivity.
When generating diagrams in the No Slot Internal Connectivity mode, if there is complex slot internal connectivity caused by multiple cavities mapped to the same functional source, the system generates a pin to represent each cavity. For example, 2 pins of a device DEV1 are mapped to the same cavity of a slot SLOT1:
Figure 394: Functional Pin Mapped to Multiple Cavities Topology
Figure 395: Functional Pin Mapped to Multiple Cavities Generated Diagram
If there are holes mapped to an internal splice, no slot internal connectivity is generated, regardless of the generation mode. For example:
Figure 396: Generation of a Slot Internal Splice Mapped Entirely to Holes
When Capital Schematic Generator for Systems Integrator generates slot internal connectivity, it generates a pin for each connector cavity or hole connection on the slot boundary device and connects it to the slot internal device or splice.
The slot boundary device inherits the name, attributes, properties and option expression of the slot. However, its name may be appended with a unique suffix to avoid conflicting names with generated slot internal devices. If the slot has an integral connector, the slot boundary device is generated with a Harness attribute and a Levels property. Library and symbol references are replicated from the slot to the generated boundary device.
If a slot internal pin is mapped to a single connector cavity, the connector pin is attached to a slot internal pin.
Where a slot internal device represents a splice, a splice is generated only when there is at least one hole. If all of the pins are mapped to connector cavities, a net conductor is generated to connect the slot-external pins. Where there is at least one hole, a splice is generated and connected to any slot-external pins with wires (splices cannot be attached to nets). Where the slot internal splice is connected through a hole, the external conductor connects directly to the generated splice. The splice inherits the name, properties and attributes of its slot device. The splice also has a read-only attribute that only displays when it is set, containing the name of the slot from which it was generated.
Examples of Source Connectivity
and Generated Results
| Representation of source connectivity | Expected generated result with All Slot Internal Connectivity | Expected generated result with Minimum Slot Internal Connectivity |
|---|---|---|
| Example of simple slot internal connectivity where DEV2 has a pin mapped to a hole: | ||
| Example of complex slot internal connectivity where the mapping between pins and cavities/holes is not one to one: | ||
| As for All Slot Internal Connectivity | ||
| Example of complex slot internal device connectivity where more than one device is connected to the same connector: | ||
| As for All Slot Internal Connectivity | ||
| Example of a slot internal splice mapped entirely to connector cavities with multiple wires: | ||
| As for All Slot Internal Connectivity | ||
| Example of a slot internal splice mapped entirely to holes with multiple wires connected to one hole: | ||
| As for All Slot Internal Connectivity |
Parent Topic:
Capital Schematic Generator for Systems Integrator
Capital Systems Integrator User Guide, 2512.2606
Unpublished work. © 2026 Siemens
Source: https://docs.sw.siemens.com/en-US/doc/861057055/202511026.capital_si_user/id9883a11b-f71c-459e-a753-4e73e89893a3 · retrieved 2026-07-18