Capital Wiring Integrator > Wires (Capital Wiring Integrator)

Annotating Topology Wire Lengths and Harness

Attributes Back to Logical Design Objects

You can back annotate the real-world length of wires in the topology diagram (specified as the value of the Wire Length attribute on the Edit Properties: Wire Dialog) to the source wires in the associated Capital Logic Designer designs. The action also back annotates Harness attributes for wires, splices, and any devices that are directly connected within the harness (that is, devices that have direct wire connections and no connector in-between).

Capital Wiring Integrator back-annotates the Harness attribute according to the name of the harness in which the object (that is, wire/device/splice) is located.

Note

If you are working in Single‑User mode or Read‑Only mode, this action updates wiring objects in all the associated Capital Logic Designer designs if you are allowed to modify them. For example, issues such as a missing lock, missing style set, or missing permissions will cause the action to fail because you cannot modify the Capital Logic Designer design or an object in it.

If you are working in Multi‑User mode (see Harness Concurrency for an explanation of what this means), this action updates wiring only from locked harnesses and refreshes the unlocked harnesses before running. It also opens and locks any Capital Logic Designer designs that need to be updated. As in Single‑User mode, issues such as a missing lock, will cause the action to fail.

Restrictions and Limitations

This action is disabled when:

Topology design is open in Read‑Only, Single‑User, or Multi‑User mode but no Capital Logic Designer designs are associated.
Topology design is open in Multi‑User mode and has some association, but no harnesses are locked.
Topology design is open in Multi‑User mode and has some association. Some harnesses are locked but they do not have any wiring.

Procedure

With the topology diagram open, press the space bar and enter Back Annotate.

Results

The Length value from the topology wires are copied to the attributes of the source wires in the Capital Logic Designer designs.
Harness attributes are back-annotated to wires, devices, and splices in the Capital Logic Designer designs with the name of the harness in which the object (wire, device, or splice) is located in Capital Wiring Integrator.
A Back Annotate tab in the Output Window at the bottom of the application interface reports:

When back annotation is complete or when no updates were made.

Where back annotation was not possible because objects are frozen, objects could not be locked, or a design is being edited in another session.

Which designs were updated, and from which harnesses.

Figure 187: Back Annotate Output Window

Parent Topic:

Wires (Capital Wiring Integrator)