Connector Refinement and Signal Mapping Overview

The Signal Map dialog boxes in Capital Systems Integrator enable you to perform connector refinement. That means, you can take a generalized connector (inline, interface or slot) and create a mini-topology that replaces the generalized connector with one or more specialized connectors.

Once specialized connectors exist, the signal map is used to map signals and/or wires to specific connector cavities. Connector refinement provides a separation between the basic topology of harnesses (which harnesses connect to which others) and the exact implementation of the connectors. You can optimize the number of connectors and exact signal connectivity without the need to edit and re-edit the bundle topology on the diagram. If a connector has a library part assigned, you cannot change the number of cavities or cavity names.

Note

If you have upgraded from a version of Capital prior to 2010.1, connector refinement data is migrated. The old refinement data was based on harness levels, which are a collection of options. Therefore, where a wire was mapped to different connector cavities in separate mappings, the system creates a variant wire. The variant option expression is a combination of the options on the harness levels for that mapping.

This functionality enables you to model:

• Multiple connectors at a slot connector on a slot, an interface connector, or an inline connector By adding specialized connectors in the Connector Mating Table at the top of the Signal Map dialog box.

• Different wires connected to the same cavity By defining the exact mapping on the Signal Mappings tab at the bottom of the Signal Map dialog box. Each wire has its own mapping. This would only normally be done when the wires are mutually exclusive, however, the system does not check for this.

• Variant connectors By specifying variant option expressions on individual connectors in the Connector Mating table at the top of the Signal Map dialog box. This can be done before or after wiring synthesis.

• Variant wires By defining Variant Wires or Variant Signals on the Signal Mappings tab at the bottom of the Signal Map dialog box before or after running wiring synthesis. These are listed on the Signal Mappings tab like any other wire but display the variant option expression in addition to the wire and signal name.

• Looped wires By defining two mappings for a wire on the Signal Mappings tab at the bottom of the Signal Map dialog box. Each row displays the same wire but maps it to a different connector cavity.

• N:M mating By defining the exact mapping on the Signal Mappings tab at the bottom of the Signal Map dialog box.

See Usage Examples for Connector Refinement and Signal Mapping for detailed examples.

There are various terms related to connector refinement that you must understand, see Generalized Connector, Specialized Connector, and Fanout.

There are various terms related to signal mapping that you must understand, see Variant Wire and Variant Signal.

Caution

You cannot import wiring data XML from a Capital version prior to v2010.1.

Parent Topic:

Connector Refinement and Signal Mapping

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens