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How Synthesis Calculates the Cost of a Wiring Route for a Signal

When the system synthesizes signals, it looks for the cheapest (generally the shortest) route. It therefore has to calculate the cost of a wiring route.

The cost of a route is calculated by summing the following:

  • Cost of each wire Calculated by multiplying the wire length by cost per unit length. By default, the cost per unit length is 1 but you can change this by applying the “Cost of wire per unit length” constraint to the design, a harness or a bundle.

  • Cost of each splice By default, the cost of a splice is 0 but you can change this by applying the “Cost of splice” constraint to the design, a harness or a bundle.

  • Cost of each multi-term By default, the cost of a multi-term is 0 but you can change this by applying the “Cost of multiterm” constraint to a cavity, a connector, a slot or a design.

  • Cost of traversing an inline pair By default, the cost of traversing an inline pair is 0 but this can be changed by applying the “Cost per wire for Inline/Junction Box” constraint to an inline half, a harness or a design.

  • Cost of traversing a junction box By default, the cost of traversing a junction box is 0 but this can be changed by applying the “Cost per wire for Inline/Junction Box” to a junction box itself, a harness or a design.

The cost values are not monetary values. They are simply units to indicate that something is less or more desirable than something else. For example, if the cost of a splice is 1 and the cost of a multi-term is 3, the splice is a third of the cost of the multi-term.

Note that only the cost of each wire has a default value higher than 0. Therefore, unless the other constraints are applied, the system assumes that the shortest wiring solution is best regardless of the number of splices, and so on. When the other constraints are applied, a longer route may be cheapest because it has fewer splices, and so on.

Also, note that constraints can vary across a design so a wire or splice in one area may cost more or less than a wire or splice elsewhere.

Parent Topic:

Synthesizing Wiring

Related Topics

  • Synthesizing Wiring

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens

Source: https://docs.sw.siemens.com/en-US/doc/861057055/202511026.capital_si_user/id8cff0633-0ede-4ef4-a026-6b8f3831080a · retrieved 2026-07-18