CapitalKnowledge

Connector Refinement and Signal Mapping

Preferred Signal

Behavior during Wiring Synthesis

If you have not synthesized wiring yet, you can select a preferred signal for a cavity in an inline's signal map. Wiring synthesis maps that signal to this cavity as a preference rather than using an unassigned cavity or creating a new cavity.

When routing a signal, wiring synthesis determines the cheapest path and so determines through which inlines the signal goes. Synthesis then selects a cavity to route the signal through.

When doing this, synthesis looks at whether preferred signals are specified in the inline's signal map. If all cavities are blocked (that is, with another signal or a non-matching preferred signal) and it is not possible to add a new cavity (that is, the connector has a part number), then synthesis will not be able to route through this inline and must choose the next cheapest path.

Some considerations:

  • Synthesis routes the signal through the cheapest path when multiple paths are available, even if the signal is specified as a preferred signal in an inline pair on a higher cost path.

  • If a signal is set as a preferred signal for a cavity in an inline pair on the cheapest cost path, synthesis routes it through that cavity.

  • If part numbers have been assigned to the halves of an inline pair, all of the cavities have preferred signals specified, and none match the signal being routed, the signal cannot go through that inline. This means, synthesis will route it through the next cheapest path.

  • If no part numbers have been assigned to the halves of an inline pair, all of the cavities have preferred signals specified, and none match the signal being routed, synthesis can still route the signal through that inline by adding a cavity.

Parent Topic:

Connector Refinement and Signal Mapping

Related Topics

  • Mapping a Signal Between Cavities on the Halves of an Inline Connector

  • Signal Map Dialog Box for Inline

  • Copied Data When Cloning a Connector

  • Usage Example - Setting Two Preferred Signals for One Cavity in the Signal Map of an Inline Connector

  • Usage Example - Refining an Inline Connector Before Wiring Synthesis

Capital Systems Integrator User Guide, 2512.2606

Unpublished work. © 2026 Siemens

Source: https://docs.sw.siemens.com/en-US/doc/861057055/202511026.capital_si_user/id0022a42e-32c6-4f2c-b7d8-0005a2d689a6 · retrieved 2026-07-18