Wiring > Prototype Wiring
Generating a Wiring View of a Synthesized Signal or Multicore
After wiring synthesis, you can generate a wiring view of synthesized signals or multicores (also referred to as visualize wiring). The wiring view shows individual devices, connectors, and wires that implement the selected signals. If a signal is a member of a multicore, the entire multicore is included in the wiring view. You can save the wiring view as a Capital Logic Designer design.
This functionality sometimes uses a Capital Schematic Generator for Systems Integrator license.
| Action | Capital Schematic Generator for Systems Integrator License Used? |
|---|---|
| Visualize a single signal (including combined signals and multicores) | No |
| Visualize any number of children of a single combined signal | No |
| Visualize multiple signals (including combined signals and multicores) | Yes (while generating) |
| Saving one or more visualized signals as a Capital Logic Designer design | Yes (while saving) |
Prerequisites
Wiring must have been synthesized. See Synthesizing Wiring.
Note
You set a project preference “Use Logic Diagram Grid Spacing” to control whether visualized wiring diagrams use a calculated grid spacing which may vary (the default) or use the same grid spacing as specified in the project preferences for Capital Logic Designer diagrams.
See Project Preferences for Capital Systems Integrator Designs in the Capital Design Tools - Common Functions User Guide.
Procedure
Decide whether you want to visualize wiring for a signal or a multicore.
If you want to...
Do the following:
Generate a wiring view for a single signal
In the Design Browser (Design tab), select the signal and either:
Click the Visualize the selected signals button ().
Right- click the selected signal and choose Visualize Signals.
A tab named after the signal displays in the Output Window. If the signal is a member of a multicore, the tab is named after the multicore.
Generate a wiring view for a single multicore
In the Design Browser (Design tab):
Select the multicore and click the Visualize the selected multicore button ().
Right-click the multicore and choose Visualize Multicore.
A tab named after the multicore displays in the Output Window.
Generate a wiring view for multiple signals and multicores
In the Design Browser (Design tab), select the signals and multicores:
Click the Visualize the selected signals button ().
Right-click a selected signal or multicore and choose Visualize Signals.
A tab named Multiple Signals displays in the Output Window.
The tab contains a wiring diagram for the signals or multicores. See Signal/Multicore (Wiring View) Tab (Output Window) for a description of all the features on this tab.
Note If you select to visualize a parent combined signal (SIG200 in the example below), all child signals are visualized. If you select a child signal to visualize, the system visualizes wires belonging to that child and wires belonging directly to the parent (in this example, wires WIRE216 and WIRE238). You can select multiple child signals.If you have the necessary license to maintain multiple style sets, select the style set you want to use from the Style dropdown list on the wiring view. If you do not have the necessary license, only the default style set for Capital Logic Designer is available.
Note When generating a wiring view, you can style the display of particular attributes and properties in the wiring view. You may want to do this for the following:
Refined connector and cavity information - The system copies and adds attribute and property values for refined connectors in a specific way. See Refined
Connector Attributes and Properties in Wiring Views.
Internal device
properties - Where a slot contains several
devices (for example a fuse box), you may want to know which device
is actually connected to the visualized signal, or whether multiple
devices are connected to the same signal. See Internal Device Properties
in Wiring Views.
Placement option
expressions - Devices in the wiring view are
given an option expression based on device and placement
expressions. You can view this option expression in a tooltip by
holding your mouse over a device. However, you may want to display
them permanently. See Placement Option
Expression in Wiring Views.
Decide which sort of view you want to use. You can click Switch to Compact View () / Switch to Layout View () to toggle between a Compact View (where device and inline positions are kept as close as possible) or a Layout View (where device and inline positions follow their relative positions in the Capital Systems Integrator diagram).
For an example of each sort of view, see the Examples section.
Note For a signal that spans across multiple planes, the layout is visualized in Compact View mode only. A message displays in the status bar: Signalis visualized in Compact View mode since the signal spans across multiple planes. If the wiring view is cluttered, specify a higher number for the Spacing option on the wiring view so that the amount of whitespace between the objects increases.In Layout View, the value entered for Spacing is the minimum number of grid spaces between connected pin lists (devices, inlines, splices). For example, if there is a wire between an inline pin to a splice pin, and the Spacing value is 5, the wire segment between the inline and splice will be at least 5 grids.
Tip You can click and drag the tab name to tear this tab from the application interface so that it is a free-floating dialog box that you can resize. To return the wiring view to the Output Window, close the dialog box.
You can click the buttons near the right end of the
wiring view toolbar to toggle the display of text on the wiring view:
Display all text , Display
names only , Hide
all text .
In Layout View, you can edit advanced spacing controls to improve the readability of the wiring view (unavailable in Compact View). Click the ellipses button () on the wiring view toolbar and edit the following settings:
Horizontal Spacing Increment
Increases the grid point spacing between components in the horizontal direction, on top of the value computed from the Spacing value.
Pin Spacing Increment
Increases the grid point spacing between pins, on top of the default value computed for the layout. Recommended if there are multi-term signals in the wiring view.
Route multicore inner cores together
Select to prioritize routing by multicore to display fewer crossovers of nested multicores and improve the positioning of multicore symbols:
First lays out all multicore-related conductors, including shield terminations and conductors that terminate on multicore splices.
Lays out non-multicore conductors.
Note When Route multicore inner cores together is selected, the following is recommended:Have a Pin Spacing Increment value of 0. There can be unexpected results if it has a non-zero value, especially when there are pins with multi-terminations. Select Allow pins to change sides. Both options being selected produces better results during schematic generation. Allow pins to change sides Select to switch sides of the pin lists on pin list objects to create a cleaner wiring view with fewer crossovers and shorter routing paths. Clear to display the wiring view based on the wiring data in the Platform design. See also Optimized Pin and Multicore Indicator Positioning.Click Apply to reflect the advanced spacing controls settings in the wiring view.
To examine the wiring for a particular signal or multicore, select it in the Signal/Multicore dropdown list at the top of the tab.
Wiring belonging to all other signals or multicores is dimmed as a result, and the signal or multicore selected in the Signal/Multicore dropdown list is also selected in the Design Browser.
Note If you select an object in the wiring view, it highlights in the Capital Systems Integrator diagram and in the Design Browser (Design tab at the bottom of the left of the application). When you select a connectivity object in the Capital Systems Integrator diagram or the Design Browser, it is highlighted in both those places and in the wiring view.By default the wiring for all configurations is displayed in the visualized wiring view (No Filtering). You can filter the view to show the wiring for selected vehicle models, configurations, or options by clicking the following menu options, and making selections as required:
Figure 227: Wiring View Filtering Options
Vehicle Models Displays a dialog box where you can select the vehicle models.
Configurations Displays a dialog box where you can select the configurations.
Select Options Displays a dialog box where you can select the options.If required, edit the wiring (see Wire Editing in Capital Systems Integrator). Within the wiring view, you can right-click an object to display the standard menu available for that object within Capital Systems Integrator. For example, you can choose Properties and edit the attributes/properties for that object.
Note You can select multiple objects in the wiring view. If you want to select only wires, hold Ctrl and the left mouse button, and drag to draw a bounding box around the wires you want to select. Selected wires highlight in red. You can then perform actions on the selected wires, without the action being applied to other objects (such as splices, shields, and multicore indicators).After editing the data, click the Refresh button () on the wiring view tab to update the wiring view with the changes.
If you want to save the wiring view, click the Save visualized wiring button (). The Save Visualized Wiring Dialog
Box displays.
- Specify the details for the new Capital Logic Designer design and click OK.Note Prototype designs should not have a colon ':' in their names.
When specifying details for the Capital Logic Designer design, you can add a Prototype Wiring constraint to the Capital Systems Integrator design, provided only a single signal or multicore has been visualized. The system adds the constraint to the Edit Prototype Wiring dialog box for the Capital Systems Integrator design. The constraint specifies that wiring synthesis will use wiring from the generated Capital Logic Designer design for the selected signal or multicore. See Prototype Wiring for an explanation of this concept.
Results
The system saves the wiring view as the Capital Logic Designer design and adds it to the Project Browser Window.
You can use the Capital Logic Designer design as prototype (template) wiring when you synthesize wiring in Capital Systems Integrator.
Note
After you have generated a visualized wiring view of signals or multicores, you can build on that wiring view by selecting connections to device pins that you want to add to it. This adds only the wiring connecting to the selected pin, automatically tracing through splices, inline connectors and slot splices. See Building Up a Wiring View of Synthesized Signals or Multicores.
Examples
Figure 228: Capital Systems Integrator Diagram Layout
Figure 229: Generated Layout View
Figure 230: Generated Compact View
Parent Topic:
Prototype Wiring
Related Topics
Specifying Prototype Wiring Constraints
Refined Connector Attributes and Properties in Wiring Views
Capital Systems Integrator User Guide, 2512.2606
Unpublished work. © 2026 Siemens
Source: https://docs.sw.siemens.com/en-US/doc/861057055/202511026.capital_si_user/idf40a4236-80b1-4220-82ec-ddd8699011ef · retrieved 2026-07-18